000 -LEADER |
fixed length control field |
01943cam a2200349 a 4500 |
001 - CONTROL NUMBER |
control field |
u8853 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
SA-PMU |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20210418123730.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
030226s2004 caua b 001 0 eng |
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
LC control number |
2003102726 |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
DLC |
Language of cataloging |
eng |
Transcribing agency |
DLC |
Modifying agency |
BAKER |
-- |
BTCTA |
-- |
Q3H |
-- |
YDXCP |
-- |
YJL |
-- |
BDX |
-- |
OCLCF |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
0534378048 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9780534378042 |
035 ## - SYSTEM CONTROL NUMBER |
System control number |
(OCoLC)53375080 |
050 00 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7868.L6 |
Item number |
R67 2006 |
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.39/5 |
Edition number |
22 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Roth, Charles H. |
245 10 - TITLE STATEMENT |
Title |
Fundamentals of logic design / |
Statement of responsibility, etc. |
Charles H. Roth, Jr. |
250 ## - EDITION STATEMENT |
Edition statement |
5th ed. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
Belmont, CA : |
Name of publisher, distributor, etc. |
Thomson/Brooks/Cole, |
Date of publication, distribution, etc. |
c2006. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xxi, 687 p. : |
Other physical details |
ill. ; |
Dimensions |
24 cm. + |
Accompanying material |
1 CD-ROM (4 3/4 in.) |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc. note |
Includes bibliographical references (p. 623) and index. |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Number systems and conversion -- Boolean Algebra -- Boolean Algebra cont'd. -- Applications of Boolean Algebra minterm and maxterm expansions -- Karnaugh maps -- Quine-McCluskey Method -- Multi-level gate circuits NAND and NOR gates -- Combinational circuit design and simulation using gates. -- Multiplexers, decoders, and programmable logic devices -- Introduction to VHDL -- Latches and flip-flops -- Registers and counters -- Analysis of clocked sequential circuits -- Derivation of state graphs and tables reduction of state tables -- State assignment -- Sequential circuit design -- VHDL for sequential logic -- Circuits for arithmetic operations -- State machine design with SM charts -- VHDL for digital system design. |
596 ## - |
-- |
1 |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Logic circuits. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Logic design. |
856 41 - ELECTRONIC LOCATION AND ACCESS |
Materials specified |
Table of contents |
Uniform Resource Identifier |
<a href="http://catdir.loc.gov/catdir/toc/fy042/2003102726.html">http://catdir.loc.gov/catdir/toc/fy042/2003102726.html</a> |
856 42 - ELECTRONIC LOCATION AND ACCESS |
Materials specified |
Contributor biographical information |
Uniform Resource Identifier |
<a href="http://catdir.loc.gov/catdir/enhancements/fy1103/2003102726-b.html">http://catdir.loc.gov/catdir/enhancements/fy1103/2003102726-b.html</a> |
856 42 - ELECTRONIC LOCATION AND ACCESS |
Materials specified |
Publisher description |
Uniform Resource Identifier |
<a href="http://catdir.loc.gov/catdir/enhancements/fy1103/2003102726-d.html">http://catdir.loc.gov/catdir/enhancements/fy1103/2003102726-d.html</a> |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Books |
994 ## - |
-- |
Z0 |
-- |
SUPMU |