000 -LEADER |
fixed length control field |
03010cam a22003494a 4500 |
001 - CONTROL NUMBER |
control field |
u8817 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
SA-PMU |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20210418123833.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
040303s2004 njua bf 001 0 eng |
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
LC control number |
2004046509 |
Canceled/invalid LC control number |
2004105832 |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
DLC |
Language of cataloging |
eng |
Transcribing agency |
DLC |
Modifying agency |
MUQ |
-- |
BAKER |
-- |
UKM |
-- |
BTCTA |
-- |
YDXCP |
-- |
UQ1 |
-- |
IG# |
-- |
DEBBG |
-- |
UKMGB |
-- |
BDX |
-- |
UMR |
-- |
OCLCF |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
013142291X |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9780131422919 |
035 ## - SYSTEM CONTROL NUMBER |
System control number |
(OCoLC)54753180 |
Canceled/invalid control number |
(OCoLC)56447118 |
042 ## - AUTHENTICATION CODE |
Authentication code |
pcc |
050 00 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK5102.9 |
Item number |
.G72 2004 |
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.382/2 |
Edition number |
22 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Granberg, Tom, |
Dates associated with a name |
1949- |
245 10 - TITLE STATEMENT |
Title |
Handbook of digital techniques for high-speed design : |
Remainder of title |
design examples, signaling and memory technologies, fiber optics, modeling and simulation to ensure signal integrity / |
Statement of responsibility, etc. |
Tom Granberg. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
Upper Saddle River, NJ : |
Name of publisher, distributor, etc. |
Prentice Hall PTR, |
Date of publication, distribution, etc. |
2004. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xliv, 928 p. : |
Other physical details |
ill. ; |
Dimensions |
24 cm. |
490 1# - SERIES STATEMENT |
Series statement |
Prentice Hall modern semiconductor design series |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc. note |
Includes bibliographical references and index. |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Trends in High-Speed Design -- ASICs, Backplane Configurations, and SerDes Technology -- A Few Basics on Signal Integrity -- Gunning Transceiver Logic (GTL, GTLP, GTL+, AGTL+) -- Low Voltage Differential Signaling (LVDS) -- Bus VLDS (BLVDS), LVDS Multipoint (LVDM), and Multipoint LVDS (M-LVDS) -- High-Speed Transceiver Logi (HSTL) and Sub-Series Terminated Logic (SSTL) -- Emitter Coupled Logic (ECL, PECL, LVPECL, ECLinPS Lite and Plus, SiGe, ECL Pro, GigaPro and GigaComm) -- Current-Mode Logic (CML) -- FPGAs - 11.1Gbps RocketIOs and HardCopy Devices -- Fiber-Optic Components -- High-Speed Interconnects and Cabling -- Memory Device Overview and Memory Signaling Technologies -- Double Data Rate SDRAM (DDR, DDR2) and SPICE Simulation -- GDDR3, ZBT, FCRAM, SigmaRAM, RLDRAM, DDR SRAM, Flash, FeRAM, and MRAM -- Quad Data Rate (QDR, QDRII) SRAM -- Direct Rambus DRAM (DRDRAM) -- Xtreme Data Rate (XDR) DRAM, FlexPhase and ODR -- Differential and Mixed-Mode S-Parameters -- Time Domain Reflectometry (TDR), Time Domain Transmission (TDT), and VNAs -- Modeling with IBIS -- Mentor Graphics - EDA Tools for High-Speed Design, Simulation, Verification, and Layout -- Advances in Design, Modeling, Simulation, and Measurement Validation of High-Performance Board-to-Board 5-10 Gbps Interconnects -- IBIS Modeling and Simulation of High-Speed Fiber-Optic Transceivers -- Design with LVDS -- Designing to 10 Gbps Using SerDes Transceivers, Serializers, and Deserializers -- WarpLink SerDes System Design Example -- Electrical Optical Circuit Board (EOCB) -- RapidIO -- PCI Express and ExpressCard -- Electrical and Optical Test Equipment. |
596 ## - |
-- |
1 |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Signal processing |
General subdivision |
Digital techniques |
Form subdivision |
Handbooks, manuals, etc. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Very high speed integrated circuits |
General subdivision |
Design and construction |
Form subdivision |
Handbooks, manuals, etc. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Signal integrity (Electronics) |
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
Uniform title |
Prentice Hall modern semiconductor design series. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Books |
994 ## - |
-- |
Z0 |
-- |
SUPMU |