Advanced computer arithmetic design / Michael J. Flynn, Stuart F. Oberman.

By: Flynn, M. J. (Michael J.), 1934-Contributor(s): Oberman, Stuart F, 1971-Material type: TextTextPublisher: New York : J. Wiley, c2001Description: xv, 325 p. : ill. ; 24 cmISBN: 0471412090 (cloth : alk. paper); 9780471412090 (cloth : alk. paper)Subject(s): Computer arithmetic and logic unitsDDC classification: 004/.01/513 LOC classification: TK7895.A65 | F59 2001Online resources: Contributor biographical information | Publisher description | Table of Contents
Contents:
Integer Addition -- Ripple Adders; Manchester Carry Chain -- Carry Skip Adders; Multilevel Carry Skip -- Carry-Select and Conditional-Sum Adders -- Carry Lookahead Adders; Canonic Adders -- Ling Adders -- Adder Implementations -- An ECL Ling Adder -- Group Generates -- Lookahead Network -- Final Sum -- Critical Path -- Implementation -- A CMOS Ling Adder -- Group Generates -- Lookahead Network -- Final Sum -- Critical Path -- Implementation -- Floating-Point Addition -- Improved Algorithms for High-Speed FP Addition -- A Brief Review of FP Addition Algorithms (A1 and A2) -- A New Algorithm: A3 (Two Path with Integrated Rounding) -- Variable-Latency FP Addition -- Variable-Latency Algorithm -- Two-Cycle Algorithm -- One-Cycle Algorithm -- Performance Results -- Multiplication with Partially Redundant Multiples -- Add and Shift -- Dot Diagrams -- Booth's Algorithm -- Booth 3 -- Booth 4 and Higher -- Redundant Booth -- Booth 3 with Fully Redundant Partial Products -- Booth 3 with Partially Redundant Partial Products -- Dealing with Negative Partial Products -- Booth with Bias -- Choosing the Right Constant -- Producing the Multiples -- Redundant Booth 3 -- Redundant Booth 4 -- Choosing the Adder Length -- Multiplier Topologies -- Review of Issues in Partial-Product Summation -- Regular Topologies -- Array Topologies -- Tree Topologies -- Effects of the Number of Tracks per Channel -- Irregular Topologies -- Wallace Tree -- Algorithmic Generation -- Technology Scaling Effects on Multipliers.
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"A Wiley-Interscience publication."

Includes bibliographical references (p. 309-319) and index.

Integer Addition -- Ripple Adders; Manchester Carry Chain -- Carry Skip Adders; Multilevel Carry Skip -- Carry-Select and Conditional-Sum Adders -- Carry Lookahead Adders; Canonic Adders -- Ling Adders -- Adder Implementations -- An ECL Ling Adder -- Group Generates -- Lookahead Network -- Final Sum -- Critical Path -- Implementation -- A CMOS Ling Adder -- Group Generates -- Lookahead Network -- Final Sum -- Critical Path -- Implementation -- Floating-Point Addition -- Improved Algorithms for High-Speed FP Addition -- A Brief Review of FP Addition Algorithms (A1 and A2) -- A New Algorithm: A3 (Two Path with Integrated Rounding) -- Variable-Latency FP Addition -- Variable-Latency Algorithm -- Two-Cycle Algorithm -- One-Cycle Algorithm -- Performance Results -- Multiplication with Partially Redundant Multiples -- Add and Shift -- Dot Diagrams -- Booth's Algorithm -- Booth 3 -- Booth 4 and Higher -- Redundant Booth -- Booth 3 with Fully Redundant Partial Products -- Booth 3 with Partially Redundant Partial Products -- Dealing with Negative Partial Products -- Booth with Bias -- Choosing the Right Constant -- Producing the Multiples -- Redundant Booth 3 -- Redundant Booth 4 -- Choosing the Adder Length -- Multiplier Topologies -- Review of Issues in Partial-Product Summation -- Regular Topologies -- Array Topologies -- Tree Topologies -- Effects of the Number of Tracks per Channel -- Irregular Topologies -- Wallace Tree -- Algorithmic Generation -- Technology Scaling Effects on Multipliers.

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