Advanced computer arithmetic design / Michael J. Flynn, Stuart F. Oberman.
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Female Library | TK7895 .A65 F59 2001 (Browse shelf (Opens below)) | 1 | Available | STACKS | 51952000171959 | |
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Main Library | TK7895 .A65 F59 2001 (Browse shelf (Opens below)) | 1 | Available | STACKS | 51952000140870 |
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TK7888.4 .C57 2016 Circuits and systems for security and privacy / | TK7888.4 .M36 2008 Logic and computer design fundamentals / | TK7888.4 .M365 2008 Introduction to logic and computer design / | TK7895 .A65 F59 2001 Advanced computer arithmetic design / | TK7895 .E42 A68 2008 Digital design : an embedded systems approach using Verilog / | TK7895 .E42 A69 2008 Digital design : an embedded systems approach using VHDL / | TK7895 .E42 C88 2007 Customizable embedded processors : design technologies and applications / |
"A Wiley-Interscience publication."
Includes bibliographical references (p. 309-319) and index.
Integer Addition -- Ripple Adders; Manchester Carry Chain -- Carry Skip Adders; Multilevel Carry Skip -- Carry-Select and Conditional-Sum Adders -- Carry Lookahead Adders; Canonic Adders -- Ling Adders -- Adder Implementations -- An ECL Ling Adder -- Group Generates -- Lookahead Network -- Final Sum -- Critical Path -- Implementation -- A CMOS Ling Adder -- Group Generates -- Lookahead Network -- Final Sum -- Critical Path -- Implementation -- Floating-Point Addition -- Improved Algorithms for High-Speed FP Addition -- A Brief Review of FP Addition Algorithms (A1 and A2) -- A New Algorithm: A3 (Two Path with Integrated Rounding) -- Variable-Latency FP Addition -- Variable-Latency Algorithm -- Two-Cycle Algorithm -- One-Cycle Algorithm -- Performance Results -- Multiplication with Partially Redundant Multiples -- Add and Shift -- Dot Diagrams -- Booth's Algorithm -- Booth 3 -- Booth 4 and Higher -- Redundant Booth -- Booth 3 with Fully Redundant Partial Products -- Booth 3 with Partially Redundant Partial Products -- Dealing with Negative Partial Products -- Booth with Bias -- Choosing the Right Constant -- Producing the Multiples -- Redundant Booth 3 -- Redundant Booth 4 -- Choosing the Adder Length -- Multiplier Topologies -- Review of Issues in Partial-Product Summation -- Regular Topologies -- Array Topologies -- Tree Topologies -- Effects of the Number of Tracks per Channel -- Irregular Topologies -- Wallace Tree -- Algorithmic Generation -- Technology Scaling Effects on Multipliers.
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