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    Engineering digital design / by Richard F. Tinder.

    By: Tinder, Richard F. (Richard Franchere), 1930-2011Contributor(s): Tinder, Richard F. (Richard Franchere), 1930-2011. Digital engineering designMaterial type: TextTextPublisher: San Diego : Academic Press, c2000Edition: 2nd edDescription: x xvi, 884 p. : ill. ; 26 cm. + 1 computer optical disc (4 3/4 in.)ISBN: 0126912955 (alk. paper); 9780126912951 (alk. paper); 0126912963 (CD-ROM); 9780126912968 (CD-ROM)Subject(s): Digital electronics | Logic designDDC classification: 621.39/5 LOC classification: TK7868.D5 | T56 2000Online resources: Table of contents | Publisher description
    Contents:
    Introductory remarks and glossary -- Number systems, binary arithmetic, and codes -- Background for digital design -- Logic function representation and minimization -- Function minimization by using K-map XOR patterns and Reed-Muller transformation forms -- Nonarithmetic combinational logic devices -- Programmable logic devices -- Arithmetic devices and arithmetic logic units (ALUs) -- Propagation delay and timing defects in combinational logic -- Introduction to synchronous state machine design and analysis -- Synchronous FSM design considerations and applications -- Module and bit-slice devices -- Alternative synchronous FSM architectures and systems-level design -- Asynchronous state machine design and analysis: basic concepts -- The pulse mode approach to asynchronous FSM design -- Externally asynchronous/internally clocked (pausable) systems and programmable asynchronous sequencers -- Other transistor logic families -- Computer-aided engineering tools -- IEEE Standard symbols.
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    Item type Current library Call number Copy number Status Notes Date due Barcode
    Books Books Female Library
    		TK7868 .D5 T56 2000 (Browse shelf (Opens below)) 1 Available STACKS 51952000171805
    Books Books Main Library
    		TK7868 .D5 T56 2000 (Browse shelf (Opens below)) 1 Available STACKS 51952000153399

    Rev. ed. of: Digital engineering design. c1991.

    Includes bibliographical references and index.

    System requirements for accompanying CD-ROM: Contains an instructor's manual giving the solutions of all end-of-chapter problems, a logic minimization program called BOOZER which operates in the DOS mode on conventional PCs, and an interactive logic simulator called EXL-Sim2000 which operates in the Windows environment and requires little computer memory.

    Introductory remarks and glossary -- Number systems, binary arithmetic, and codes -- Background for digital design -- Logic function representation and minimization -- Function minimization by using K-map XOR patterns and Reed-Muller transformation forms -- Nonarithmetic combinational logic devices -- Programmable logic devices -- Arithmetic devices and arithmetic logic units (ALUs) -- Propagation delay and timing defects in combinational logic -- Introduction to synchronous state machine design and analysis -- Synchronous FSM design considerations and applications -- Module and bit-slice devices -- Alternative synchronous FSM architectures and systems-level design -- Asynchronous state machine design and analysis: basic concepts -- The pulse mode approach to asynchronous FSM design -- Externally asynchronous/internally clocked (pausable) systems and programmable asynchronous sequencers -- Other transistor logic families -- Computer-aided engineering tools -- IEEE Standard symbols.

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