| 000 | 01069cam a22003254a 4500 | ||
|---|---|---|---|
| 001 | u5136 | ||
| 003 | SA-PMU | ||
| 005 | 20210418125037.0 | ||
| 008 | 090827s2007 njua 001 0 eng d | ||
| 010 | _a 2009288266 | ||
| 040 |
_aOJ4 _beng _cOJ4 _dDLC _dUAT _dBAKER _dYDXCP _dIXA _dUKM _dDEBBG _dDEBSZ _dOCLCQ |
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| 020 | _a9780470052624 | ||
| 020 | _a0470052627 | ||
| 035 | _a(OCoLC)164375002 | ||
| 042 | _alccopycat | ||
| 050 | 0 | 0 |
_aTK7885.7 _b.V34 2007 |
| 082 | 0 | 4 |
_a621.392 _222 |
| 100 | 1 | _aVahid, Frank. | |
| 245 | 1 | 0 |
_aVerilog for digital design / _cFrank Vahid, Roman Lysecky. |
| 260 |
_aHoboken, N.J. : _bJohn Wiley, _c2007. |
||
| 300 |
_axvi, 173 p. : _bill. ; _c24 cm. |
||
| 500 | _aIncludes index. | ||
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 700 | 1 | _aLysecky, Roman. | |
| 856 | 4 | 1 |
_3Table of contents _uhttp://catdir.loc.gov/catdir/enhancements/fy0917/2009288266-t.html |
| 856 | 4 | 2 |
_3Publisher description _uhttp://catdir.loc.gov/catdir/enhancements/fy0917/2009288266-d.html |
| 942 | _cBOOK | ||
| 994 |
_aZ0 _bSUPMU |
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| 596 | _a1 | ||
| 999 |
_c11065 _d11065 |
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