| 000 | 01943cam a2200349 a 4500 | ||
|---|---|---|---|
| 001 | u8853 | ||
| 003 | SA-PMU | ||
| 005 | 20210418123730.0 | ||
| 008 | 030226s2004 caua b 001 0 eng | ||
| 010 | _a 2003102726 | ||
| 040 |
_aDLC _beng _cDLC _dBAKER _dBTCTA _dQ3H _dYDXCP _dYJL _dBDX _dOCLCF |
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| 020 | _a0534378048 | ||
| 020 | _a9780534378042 | ||
| 035 | _a(OCoLC)53375080 | ||
| 050 | 0 | 0 |
_aTK7868.L6 _bR67 2006 |
| 082 | 0 | 0 |
_a621.39/5 _222 |
| 100 | 1 | _aRoth, Charles H. | |
| 245 | 1 | 0 |
_aFundamentals of logic design / _cCharles H. Roth, Jr. |
| 250 | _a5th ed. | ||
| 260 |
_aBelmont, CA : _bThomson/Brooks/Cole, _cc2006. |
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| 300 |
_axxi, 687 p. : _bill. ; _c24 cm. + _e1 CD-ROM (4 3/4 in.) |
||
| 504 | _aIncludes bibliographical references (p. 623) and index. | ||
| 505 | 0 | _aNumber systems and conversion -- Boolean Algebra -- Boolean Algebra cont'd. -- Applications of Boolean Algebra minterm and maxterm expansions -- Karnaugh maps -- Quine-McCluskey Method -- Multi-level gate circuits NAND and NOR gates -- Combinational circuit design and simulation using gates. -- Multiplexers, decoders, and programmable logic devices -- Introduction to VHDL -- Latches and flip-flops -- Registers and counters -- Analysis of clocked sequential circuits -- Derivation of state graphs and tables reduction of state tables -- State assignment -- Sequential circuit design -- VHDL for sequential logic -- Circuits for arithmetic operations -- State machine design with SM charts -- VHDL for digital system design. | |
| 650 | 0 | _aLogic circuits. | |
| 650 | 0 | _aLogic design. | |
| 856 | 4 | 1 |
_3Table of contents _uhttp://catdir.loc.gov/catdir/toc/fy042/2003102726.html |
| 856 | 4 | 2 |
_3Contributor biographical information _uhttp://catdir.loc.gov/catdir/enhancements/fy1103/2003102726-b.html |
| 856 | 4 | 2 |
_3Publisher description _uhttp://catdir.loc.gov/catdir/enhancements/fy1103/2003102726-d.html |
| 942 | _cBOOK | ||
| 994 |
_aZ0 _bSUPMU |
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| 596 | _a1 | ||
| 999 |
_c4401 _d4401 |
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