Includes index.

1 Enhanced Generics 1 -- 1.1 Generic Types 1 -- 1.2 Generic Lists in Packages 6 -- 1.3 Local Packages 11 -- 1.4 Generic Lists in Subprograms 15 -- 1.5 Generic Subprograms 21 -- 1.5.1 Uninstantiated Methods in Protected Types 32 -- 1.6 Generic Packages 36 -- 1.7 Use Case: Generic Memories 43 -- 2 Other Major Features 53 -- 2.1 External Names 53 -- 2.2 Force and Release 63 -- 2.3 Context Declarations 67 -- 2.4 Integrated PSL 70 -- 2.5 IP Encryption 77 -- 2.5.1 Key Exchange 96 -- 2.6 VHDL Procedural Interface (VHPI) 97 -- 2.6.1 Direct Binding 97 -- 2.6.2 Tabular Registration and Indirect Binding 99 -- 2.6.3 Registration of Applications and Libraries 101 -- 3 Type System Changes 103 -- 3.1 Unconstrained Element Types 103 -- 3.1.1 Composite Types 103 -- 3.1.2 Subtype Indications and Constraints 107 -- 3.1.3 Use of Composite Subtypes 109 -- Variable and Signal Declarations 110 -- Constant Declarations 110 -- Attribute Specifications 111 -- Allocated Objects 111 -- Interface Objects 112 -- Summary: Determining Array Index Ranges 117 -- Type Conversions 118 -- Alias Declarations and Subtype Attributes 119 -- Resolved Composite Subtypes 122 -- 3.2 Resolved Elements 123 -- 4 New and Changed Operations 127 -- 4.1 Array/Scalar Logical Operations 127 -- 4.2 Array/Scalar Addition Operators 129 -- 4.3 Logical Reduction Operators 130 -- 4.4 Condition Operator 132 -- 4.5 Matching Relational Operators 133 -- 4.6 Maximum and Minimum 138 -- 4.7 Mod and Rem for Physical Types 140 -- 4.8 Shift Operations 141 -- 4.9 Strength Reduction and 'X' Detection 142 -- 5 New and Changed Statements 143 -- 5.1 Conditional and Selected Assignments 143 -- 5.1.1 Sequential Signal Assignments 143 -- 5.1.2 Forcing Assignments 146 -- 5.1.3 Variable Assignments 147 -- 5.2 Matching Case Statements 149 -- 5.2.1 Matching Selected Assignments 150 -- 5.3 If and Case Generate 151 -- 5.3.1 Configuration of If and Case Generate 155 -- 6 Modeling Enhancements 159 -- 6.1 Signal Expressions in Port Maps 159 -- 6.2 All Signals in Sensitivity List 161 -- 6.3 Reading Out-Mode Ports and Parameters 162 -- 6.4 Slices in Aggregates 166 -- 6.5 Bit-String Literals 167 -- 7 Improved I/O 169 -- 7.1 The To_String Functions 169 -- 7.1.1 Predefined To_string Functions 170 -- 7.1.2 Overloaded To_string Functions 171 -- 7.1.3 The To_ostring and To_hstring Functions 172 -- 7.2 The Justify Function 173 -- 7.3 Newline Formatting 173 -- 7.4 Read and Write Operations 174 -- 7.5 The Tee Procedure 177 -- 7.6 The Flush Procedure 178 -- 8 Standard Packages 179 -- 8.1 The Std_logic_1 164 Package 179 -- 8.2 The Numeric_bit and Numeric_std Packages 180 -- 8.3 The Numeric Unsigned Packages 182 -- 8.4 The Fixed-Point Math Packages 182 -- 8.5 The Floating-Point Math Packages 186 -- 8.6 The Standard Package 191 -- 8.7 The Env Package 192 -- 8.8 Operator Overloading Summary 193 -- 8.9 Conversion Function Summary 196 -- 8.10 Strength Reduction Function Summary 204 -- 9 Miscellaneous Changes 207 -- 9.1 Referencing Generics in Generic Lists 207 -- 9.2 Function Return Subtype 208 -- 9.3 Qualified Expression Subtype 209 -- 9.4 Type Conversions 209 -- 9.5 Case Expression Subtype 211 -- 9.6 Subtypes for Port and Parameter Actuals 212 -- 9.7 Static Composite Expressions 213 -- 9.8 Static Ranges 214 -- 9.9 Use Clauses, Types, and Operations 215 -- 9.10 Hiding of Implicit Operations 216 -- 9.11 Multidimensional Array Alias 217 -- 9.12 Others in Aggregates 217 -- 9.13 Attribute Specifications in Package Bodies 219 -- 9.14 Attribute Specification for Overloaded Subprograms 219 -- 9.15 Integer Expressions in Range Bounds 220 -- 9.16 Action on Assertion Violations 221 -- 9.17 'Path_Name and 'Instance_Name 221 -- 9.18 Non-Nesting of Architecture Region 223 -- 9.19 Purity of Now 223 -- 9.20 Delimited Comments 224 -- 9.21 Tool Directives 225 -- 9.22 New Reserved Words 225 -- 9.23 Replacement Characters 226 -- 10.1 Object-Oriented Class Types 229 -- 10.1.1 Standard Components Library 232 -- 10.2 Randomization 232 -- 10.3 Functional Coverage 235 -- 10.4 Alternatives 235 -- 10.5 Getting Involved 235.

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