Includes bibliographical references and index.

Trends in High-Speed Design -- ASICs, Backplane Configurations, and SerDes Technology -- A Few Basics on Signal Integrity -- Gunning Transceiver Logic (GTL, GTLP, GTL+, AGTL+) -- Low Voltage Differential Signaling (LVDS) -- Bus VLDS (BLVDS), LVDS Multipoint (LVDM), and Multipoint LVDS (M-LVDS) -- High-Speed Transceiver Logi (HSTL) and Sub-Series Terminated Logic (SSTL) -- Emitter Coupled Logic (ECL, PECL, LVPECL, ECLinPS Lite and Plus, SiGe, ECL Pro, GigaPro and GigaComm) -- Current-Mode Logic (CML) -- FPGAs - 11.1Gbps RocketIOs and HardCopy Devices -- Fiber-Optic Components -- High-Speed Interconnects and Cabling -- Memory Device Overview and Memory Signaling Technologies -- Double Data Rate SDRAM (DDR, DDR2) and SPICE Simulation -- GDDR3, ZBT, FCRAM, SigmaRAM, RLDRAM, DDR SRAM, Flash, FeRAM, and MRAM -- Quad Data Rate (QDR, QDRII) SRAM -- Direct Rambus DRAM (DRDRAM) -- Xtreme Data Rate (XDR) DRAM, FlexPhase and ODR -- Differential and Mixed-Mode S-Parameters -- Time Domain Reflectometry (TDR), Time Domain Transmission (TDT), and VNAs -- Modeling with IBIS -- Mentor Graphics - EDA Tools for High-Speed Design, Simulation, Verification, and Layout -- Advances in Design, Modeling, Simulation, and Measurement Validation of High-Performance Board-to-Board 5-10 Gbps Interconnects -- IBIS Modeling and Simulation of High-Speed Fiber-Optic Transceivers -- Design with LVDS -- Designing to 10 Gbps Using SerDes Transceivers, Serializers, and Deserializers -- WarpLink SerDes System Design Example -- Electrical Optical Circuit Board (EOCB) -- RapidIO -- PCI Express and ExpressCard -- Electrical and Optical Test Equipment.

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