VLSI test principles and architectures : design for testability / edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen.

Contributor(s): Wang, Laung-Terng | Wu, Cheng-Wen, EE Ph. D | Wen, XiaoqingMaterial type: TextTextSeries: Morgan Kaufmann series in systems on silicon: Publisher: Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, c2006Description: xxx, 777 p. : ill. ; 25 cmISBN: 0123705975 (hardcover : alk. paper); 9780123705976 (hardcover : alk. paper)Subject(s): Integrated circuits -- Very large scale integration -- Testing | Integrated circuits -- Very large scale integration -- DesignDDC classification: 621.39/5 LOC classification: TK7874.75 | .V587 2006Online resources: Table of contents | Publisher description
Contents:
Design for testability / Laung-Terng (L.-T.) Wang, Xiaoqing Wen, and Khader S. Abdel-Hafez -- Logic and fault simulation / Jiun-Lang Huang, James C.-M. Li, and Duncan M. (Hank) Walker -- Test generation / Michael S. Hsiao -- Logic built-in self-test / Laung-Terng (L.-T.) Wang -- Test compression / Xiaowei Li, Kuen-Jong Lee, and Nur A. Touba -- Logic diagnosis / Shi-Yu Huang -- Memory testing and built-in self-test / Cheng-Wen Wu -- Memory diagnosis and built-in self-repair / Cheng-Wen Wu -- Boundary scan and core-based testing / Kuen-Jong Lee -- Analog and mixed-signal testing / Chauchin Su -- Test technology trends in the nanometer age / Kwang-Ting (Tim) Cheng, Wen-Ben Jone, and Laung-Terng (L.-T.) Wang.
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TK7874.75 .V587 2006 (Browse shelf (Opens below)) 1 Available STACKS 51952000171874
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TK7874.75 .V587 2006 (Browse shelf (Opens below)) 1 Available STACKS 51952000147817

Includes bibliographical references and index.

Design for testability / Laung-Terng (L.-T.) Wang, Xiaoqing Wen, and Khader S. Abdel-Hafez -- Logic and fault simulation / Jiun-Lang Huang, James C.-M. Li, and Duncan M. (Hank) Walker -- Test generation / Michael S. Hsiao -- Logic built-in self-test / Laung-Terng (L.-T.) Wang -- Test compression / Xiaowei Li, Kuen-Jong Lee, and Nur A. Touba -- Logic diagnosis / Shi-Yu Huang -- Memory testing and built-in self-test / Cheng-Wen Wu -- Memory diagnosis and built-in self-repair / Cheng-Wen Wu -- Boundary scan and core-based testing / Kuen-Jong Lee -- Analog and mixed-signal testing / Chauchin Su -- Test technology trends in the nanometer age / Kwang-Ting (Tim) Cheng, Wen-Ben Jone, and Laung-Terng (L.-T.) Wang.

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